The present invention relates to a memory cell circuit for use in a random access memory (RAM), and more particularly, to such a cell that is radiation hard.
A typical RAM cell comprises two cross-coupled inverters, with each inverter comprising a pair of metal oxide semiconductor (MOS) transistors. Each pair has a series connected P-conductivity type channel (PMOS) transistor and a N-conductivity type channel (NMOS) transistor. This RAM may be used while exposed to all types of radiation, such as cosmic rays or to high energy electromagnetic nuclear radiation pulses, that produces electrons and holes. These charges can change the gate voltage of a MOS transistor which, in turn, can cause a change in the logic state of the memory cell.
It is known to use in a memory cell circuit resistors coupled between the output of one inverter and the input of a second inverter and a capacitor coupled between the gates of the two inserters to raise the cell resistance to radiation induced changes of the logic state. The added resistors and capacitors increase the time constant of the cell state so that the radiationinduced current pulse cannot cause a change in state of a cell. However, such a circuit has been found to be not completely effective when the entire circuit is exposed to high dose gamma or X-ray radiation.
It is therefore desirable to provide a memory cell circuit that enhances the stability of the latched logic state and resists a change in logic state even when the entire cell is subject to all types of radiation.